applications note: an_SY8009 high efficiency 1.5mhz/1mhz, 1.5a/2a synchronous step down regulator preliminary spec an_SY8009 rev. 0.2 silergy corp. confidenti al- prepared for customer use only 1 general description the SY8009a and SY8009b are high-efficiency , high frequency synchronous step-down dc-dc regulator ics capable of delivering up to 1.5a/2a output currents. the SY8009 family operate over a wide inp ut voltage range from 3v to 5.5v and integrate main switch and synchronous switch with very low r ds(on) to minimize the conduction loss. low output voltage ripple and small external induct or and capacitor sizes are achieved with greater than 1mhz switching frequency. ordering information SY8009 ( ) temperature code c: - 40 c~85 c package code: aa:sot23-5 eb:ssot23-6 spec code features low rds(on) for internal switches (top/bottom) SY8009a: 200mohm/150mohm, 1.5a, sot23-5 SY8009b:150mohm/120mohm,2.0a, ssot23-6 3-5.5v input voltage range high switching frequency minimizes the external components SY8009a: 1.5mhz SY8009b: 1mhz internal softstart limits the inrush current 100% dropout operation compact package: sot23-5 and super sot23-6 are pin-compatible. other packages are available upon requests applications lcd tv set top box net pc mini-notebook pc access point router typical applications lx in gnd fb en v in c in l r 1 r 2 v out c out c 1 (opt.) efficiency (%) figure 1 figure2 efficiency vs load current a???o? telo13380368939 qqo719307610 free datasheet http://
an_SY8009 an_SY8009 rev. 0.2 silergy corp. confidenti al- prepared for customer use only 2 pinout (top view) (SY8009a, sot23-5) (SY8009b, ssot2 3-6) top mark: ad xyz for SY8009a , as xyz for SY8009b ( device code: ad for SY8009a and as for SY8009b, x=year code, y=week code, z= lot number code) pin name pin number pin description en 1 enable control. pull high to turn on. do not f loat. gnd 2 ground pin lx 3 inductor pin. connect this pin to the switchin g node of inductor. in 4 input pin. decouple this pin to gnd pin with a t least 1uf ceramic cap. fb 6(ssot23-6) output feedback pin. connect this pi n to the center point of the output resistor divider (as shown in figure 1) to program the output voltage: vout=0.6*(1+r1/r2). absolute maximum ratings (note 1) supply input voltage ------------------------------ --------------------------------------------------- --------- 6.0v enable, fb voltage--------------------------------- --------------------------------------------------- --------- v in + 0.6v power dissipation, p d @ t a = 25c sot23-5,ssot23-6 ---------------------------------- ----------- 0.4w package thermal resistance (note 2) sot23-5,ssot23-6, ja --------------------------------------------------- ------------------------ 250c/w sot23-5,ssot23-6, jc --------------------------------------------------- -------------------------130c/w junction temperature range ------------------------ ----------------- --------------------------------- --------150c lead temperature (soldering, 10 sec.) ------------- --------------------------------------------------- ------ 260c storage temperature range ------------------------- --------------------------------------------------- ------ - 65c to 150c esd susceptibility (note 2) hbm (human body mode) ----------------------------- --------------------------------------------------- --- 2kv mm (machine mode) --------------------------------- --------------------------------------------------- ------ 200v recommended operating conditions (note 3) supply input voltage ------------------------------ --------------------------------------------------- ---------3v to 5.5v junction temperature range ------------------------ --------------------------------------------------- ----- - 40c to 125c ambient temperature range ------------------------- --------------------------------------------------- ---- - 40c to 85c a???o? telo13380368939 qqo719307610 free datasheet http://
an_SY8009 an_SY8009 rev. 0.2 silergy corp. confidenti al- prepared for customer use only 3 electrical characteristics (v in = 5v, v out = 2.5v, l = 2.2uh, c out = 10uf, t a = 25c, unless otherwise specified) parameter symbol test conditions min typ max unit input voltage range vin 3 5.5 v quiescent current i q i out= 0 , vfb=vref 105% 80 a shutdown current i shdn en=0 0.1 1 a feedback reference voltage vref 0.588 0.6 0.612 v fb input current ifb vfb=vin -50 50 na SY8009a 0.2
pfet ron rds(on),p SY8009b 0.15
SY8009a 0.15
nfet ron rds(on),n SY8009b 0.12
SY8009a 1.8 a pfet current limit i lim SY8009b 2.5 a en rising threshold venh 1.5 v en falling threshold venl 0.4 v input uvlo threshold v uvlo 1.8 v uvlo hysteresis v hys 0.1 v i out =200ma, SY8009a 1.5 mhz oscillator frequency f osc i out =500ma, SY8009b 1 mhz min on time 50 ns max duty cycle 100 % thermal shutdown temperature t sd 160 c note 1 : stresses listed as the above ?absolute maximum ra tings? may cause permanent damage to the device. these are for stress ratings. functional operation of the device at these or any other conditions beyo nd those indicated in the operational sections of the specif ications is not implied. exposure to absolute maxim um rating conditions for extended periods may remain possibil ity to affect device reliability. note 2 : ja is measured in the natural convection at ta = 25 c on a low effective single layer thermal conducti vity test board of jedec 51-3 thermal measurement standa rd. pin 2 of sot23-5/ssot-23-5 packages is the cas e position for jc measurement. note 3: the device is not guaranteed to function outside i ts operating conditions. a???o? telo13380368939 qqo719307610 free datasheet http://
an_SY8009 an_SY8009 rev. 0.2 silergy corp. confidenti al- prepared for customer use only 4 typical performance characteristics(SY8009b) efficiency vs load current efficiency vs load curre nt efficiency vs load current output ripple (vin=5.0v, vout=1.8v,iload=0.5a) output ripple (vin=5.0v, vout=1.8v,iload=1.5a) output ripple (vin=5.0v, vout=1.8v,iload=2a) startup (vin=5.0v, vout=1.8v,iload=2a) shutdown (vin=5.0v, vout=1.8v,iload=2a) short protection/current limit (vin=5.0v, vout=1.8v,open to short) free datasheet http://
an_SY8009 an_SY8009 rev. 0.2 silergy corp. confidenti al- prepared for customer use only 5 soft start(vo) soft start(lx) load transient (vin=5.0vmvout=1.8v,iload=0~1a) load transient (vin=5.0v, vout=1.8v,iload=0.2~2a) oscillator frequency vs vin case temperature vs output current (vin=5v,vo=1.8v,ta=27 ) t c (c) free datasheet http://
an_SY8009 an_SY8009 rev. 0.2 silergy corp. confidenti al- prepared for customer use only 6 operation SY8009 is a synchronous buck regulator ic that inte grates the pwm control, top and bottom switches on the same die to minimize the switching transition loss and conducti on loss. with ultra low rds(on) power switches and proprietary pwm control, this regulator ic can achieve the highest efficienc y and the highest switch frequency simultaneously t o minimize the external inductor and capacitor size, and thus achieving the minimum solution footprint. applications information because of the high integration in the SY8009 ic, t he application circuit based on this regulator ic i s rather simple. only input capacitor c in , output capaictor c out , output inductor l and feedback resistors (r1 and r2) need to be selected for the targeted applications specifications. feedback resistor dividers r1 and r2 : choose r1 and r2 to program the proper output volta ge. to minimize the power consumption under light l oads, it is desirable to choose large resistance values for both r1 and r2. a value of between 10k and 200k is highly recommend ed for r2. if r2=100k is chosen, then r1 can be calculated to be: 2 out 1 (v 0.6 v) r r 0.6v - = input capacitor c in : with the maximum load current at 1.2a, the maximum ripple current through input capacitor is about 0.6 arms. a typical x7r or better grade ceramic capacitor with 6v rating and greater than 4.7uf capacitance can ha ndle this ripple current well. to minimize the potential noi se problem, place this ceramic capacitor really clo se to the in and gnd pins. care should be taken to minimize the loop area formed by c in , and in/gnd pins. output capacitor c out : the output capacitor is selected to handle the outp ut ripple noise requirements. both steady state rip ple and transient requirements must be taken into consideration when selecting this capacitor. for the best performance, it is recommended to use x7r or better grade ceramic capa citor with 6v rating and greater than 4.7uf capacit ance. output inductor l: there are several considerations in choosing this i nductor. 1) choose the inductance to provide the desired ripple current. it is suggested to choose the ripple curr ent to be about 40% of the maximum output current. the induct ance is calculated as: out out in,max sw out,max 40% v (1 v /v ) l f i - = where fsw is the switching frequency and i out , max is the maximum load current. the SY8009 regulator ic is quite tolerant of differ ent ripple current amplitude. consequently, the fin al choice of inductance can be slightly off the calculation valu e without significantly impacting the performance. 2) the saturation current rating of the inductor must be selected to be greater than the peak inductor cu rrent under full load conditions. out out in max sat min out max sw v (1-v /v , ) i , i , 2 f l > + 3) the dcr of the inductor and the core loss at the switching frequency must be low enough to achieve the desired efficiency requirement. it is desirable to choose a n inductor with dcr<50mohm to achieve a good overal l efficiency. layout design: the layout design of SY8009 regulator is relatively simple. for the best efficiency and minimum noise problems, we should place the following components close to the ic: c in , l, r1 and r2. 1) it is desirable to maximize the pcb copper area connecting to gnd pin to achieve the best thermal a nd noise performance. if the board space allowed, a ground plane is highly desirable. free datasheet http://
an_SY8009 an_SY8009 rev. 0.2 silergy corp. confidenti al- prepared for customer use only 7 2) c in must be close to pins in and gnd. the loop area fo rmed by c in and gnd must be minimized. 3) the pcb copper area associated with lx pin must be minimized to avoid the potential noise problem. 4) the components r1 and r2, and the trace connecti ng to the fb pin must not be adjacent to the lx net on the pcb layout to avoid the noise problem. 5) if the system chip interfacing with the en pin h as a high impedance state at shutdown mode and the in pin is connected directly to a power source such as a liio n battery, it is desirable to add a pull down 1mohm resistor between the en and gnd pins to prevent the noise fr om falsely turning on the regulator at shutdown mod e. load transient considerations: the SY8009 regulator ic integrates the compensation components to achieve good stability and fast tran sient responses. in some applications, adding a 22pf cera mic cap in parallel with r1 may further speed up th e load transient responses and is thus recommended for app lications with large load transient step requiremen ts. free datasheet http://
an_SY8009 an_SY8009 rev. 0.2 silergy corp. confidenti al- prepared for customer use only 8 sot23-5 package outline & pcb layout design 2.40 0.80 0.55 0.95 typ 2.40 0.80 0.55 0.95 typ 1.50 - 1.70 0.30 - 0.50 2.80 - 3.10 2.70 - 3.00 1.50 - 1.70 0.30 - 0.50 2.80 - 3.10 2.70 - 3.00 recommended pad layout 0.1 - 0.15 0.25 ref 0.3 - 0.6 0.1 - 0.15 0.25 ref 0.3 - 0.6 1.0 - 1.3 0.01 - 0.1 1.90 typ 0.95 typ 1.0 - 1.3 0.01 - 0.1 1.90 typ 0.95 typ notes: all dimensions are in millimeters. all dimensions dont include mold flash & metal bu rr. free datasheet http://
an_SY8009 an_SY8009 rev. 0.2 silergy corp. confidenti al- prepared for customer use only 9 ssot23-6 package outline & pcb layout design 0.95 2.40 1.90 0.60 1.00 0.95 2.40 1.90 0.60 1.00 2.30 - 2.50 2.50 - 3.00 0.25 - 0.40 recommended pad layout 0.30 - 0.60 0.10 - 0.20 0.30 - 0.60 0.10 - 0.20 2.95 - 3.10 0.90 - 1.00 0.01 - 0.10 0.95 typ 2.95 - 3.10 0.90 - 1.00 0.01 - 0.10 0.95 typ notes: all dimensions are in millimeters. all dimensions dont include mold flash & metal bu rr. free datasheet http://
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